NVIDIA Targets TSMC A16 Node for "Feynman" GPUs, Skips N2 Entirely

Feynman Is the Name, and It Skips a Generation

NVIDIA is not done stacking ambitions. According to supply chain sources cited in a DigiTimes report and covered by TechPowerUp, the company is already prototyping what comes after its “Rubin” and “Rubin Ultra” GPU designs. The next microarchitecture is called “Feynman,” and it will be built on TSMC’s A16 node, a 1.6nm process that NVIDIA is apparently jumping to directly, bypassing the N2 family of nodes altogether. Mass production is scheduled for the second half of 2028.

That node skip is notable. TSMC’s N2 process was widely expected to serve as a waypoint for multiple generations of high-performance chips. NVIDIA, it seems, decided the jump to A16 was worth making in a single bound.

A Stack of Technologies Inside Each Package

Feynman’s underlying architecture is as much about packaging as it is about the transistor node itself. As reported by TechPowerUp, NVIDIA plans to lean heavily on A16’s backside power delivery, and will combine several advanced packaging approaches to squeeze performance out of the design.

The plan starts with SoIC 3D stacking, where multiple chiplets are stacked vertically into a single package. Stacking shortens the signal path between chips and reduces latency. Those stacked 3D units are then assembled side by side using CoWoS-L or the newer CoPoS packaging, resulting in what the report describes as a multi-kilowatt design capable of processing dozens of PetaFLOPS. All of this will be executed through TSMC’s COUPE technology, according to the DigiTimes sourcing.

For memory, NVIDIA is working with partners toward customized HBM, likely HBM4E, timed to arrive alongside Feynman’s production ramp. The customization here is interesting: the memory would incorporate a specialized base die that can hold logic elements like a memory controller or a packet processing unit. In plain terms, that means some data processing could happen before information even enters the memory stack, either pre-filtering data or accelerating certain operations depending on what NVIDIA needs.

Light, Not Copper, Will Carry the Load

The most striking element of the Feynman roadmap is how NVIDIA intends to handle communication between GPUs. The current Blackwell NVL72 rack delivers 130 TB/s of total inter-GPU bandwidth. Rubin doubles that to 260 TB/s. Rubin Ultra doubles it again to 520 TB/s. Those jumps were achievable with improved copper interconnects and NVLink generations.

For Feynman, the math stops working that way. As reported by TechPowerUp, NVIDIA’s answer is co-packaged optics, or CPO, which replaces copper connections between GPUs with optical interconnects. The company is targeting over 1,000 TB/s total system bandwidth with Feynman, crossing into the petabyte-per-second range. Optical interconnects consume less power than copper at those speeds and introduce lower latency, making CPO a practical necessity rather than a luxury at this scale.

What This Means for the Rest of the Roadmap

Feynman sits at least two architectural generations ahead of where NVIDIA stands today with Blackwell. Rubin has not yet reached consumers in any meaningful volume, and Rubin Ultra follows after that. Feynman is, by any reasonable measure, a long-range planning signal rather than an imminent product announcement.

Still, the detail in the DigiTimes sourcing suggests NVIDIA is not just sketching ideas on a whiteboard. Prototyping work is already underway, and locking in TSMC’s A16 node implies commitments that go well beyond casual roadmap speculation. Whether any of this computing power eventually finds its way into consumer GeForce products, or whether Feynman remains an AI infrastructure play like much of what Blackwell has become, is a question the report does not answer. Given the direction the company has been heading, the answer probably matters more to enterprise buyers than to anyone shopping for a gaming PC.